USING INTEGRATED CIRCUITS AIM To verify the truth tables of AND, OR, NOT, EX-OR, NAND and NOR gates using integrated circuits COMPONENTS REQUIRED AND gate (IC ), NOT gate (IC ), OR gate (IC ), NAND gate (IC ), NOR gate (IC ), X-OR gate (IC ), Power supply, Digital IC trainer kit, connecting wires. BOOLEAN EXPRESSIONS (i) AND gate Y = A.B (iv) Ex OR gate Y = AB + AB (ii) OR gate Y = A+B (v) NAND gate Y = A.B (iii) NOT gate Y = A (vi) NOR gate Y = A+B CIRCUIT DIAGRAM Pin Identification Identification mark Identification mark Figure (a) Integrated circuit Note: The chip must be inserted in the bread board in such a way that the identification mark should be on our left side. In this position, pin numbers are counted as marked in the picture above. Pin identification is the same for all chips that are mentioned below.
XII- - ) XII- - ) - - - - PRACTICAL NOT Gate: SYMBOL PIN DIAGRAM-IC GND V CC IC TRUTH TABLE Y=A NAND Gate: Y=AB Y=AB SYMBOL PIN DIAGRAM-IC GND V CC IC TRUTH TABLE X-OR Gate : SYMBOL PIN DIAGRAM-IC TRUTH TABLE Y=AB+AB Y=AB+AB GND IC NOR Gate: Y=A+B SYMBOL PIN DIAGRAM-IC TRUTH TABLE Y=A+B GND IC PROCEDURE • To verify the truth table of a logic gate, the suitable IC is taken and the connections are given using the circuit diagram. • For all the ICs, 5V is applied to the pin while the pin is connected to the ground. • The logical inputs of the truth table are applied and the corresponding output is noted. • Similarly the output is noted for all other combinations of inputs.
• In this way, the truth table of a logic gate is verified. RESULT The truth table of logic gates AND, OR, NOT, Ex-OR, NAND and NOR using integrated circuits is verified. Precautions (i) V CC and ground pins must not be interchanged while making connections. Otherwise the chip will be damaged.
(ii) The pin configuration for NOR gate is different from other gates XII- - ) XII- - ) - - - - PRACTICAL